In multiple data processing systems, each having at least one processor, many methods exist for interfacing the processors of the different data processing systems. When two computers are to be connected together, past practice has had each computer treat the other as an external input/output device. Commonly, a data channel of one processor is connected to a data channel of the other processor and then, in order to transfer, each processor must initialize its data channel with address and count information and start the channels reading into memory or writing out of memory, as appropriate. This means that before any block transfers can occur, both processors must cooperate in taking care of the initialization.
Another recognized architecture for interprocessor communication is through the use of a common bus. Once again, before any data transfers can occur, both processors must cooperate which can result in tying up the processor for an unduly long period of time.
By utilizing the adapter of the present invention as an intermediary device between the two processors, which adapter may be treated as a peripheral, the I/O initialization and initiation may be performed by the processors without requiring cooperation between them before the transfer, thereby eliminating tying up the processors. In addition, the same logic, including the software and firmware, utilized to communicate with the various peripherals may be utilized.
Accordingly, it is an object of the present invention to provide an adapter for providing a common link between data processing systems.
This and other objects of the present invention will become more apparent when taken in conjunction with the following description and attached drawings, wherein like characters indicate like parts, and which drawings form a part of the present application.